VHDL Course Outline

Duration: 48 hrs
Cost: 790 L.E.

Section 1  Field Programmable Gate Arrays (FPGAs)

1- Course Introduction
Digital Logic Fundamentals

2- Introduction to Logic Circuits

The following topics will be taught
1 Variables And Functions
2 Inversion
3 Truth Tables
4 Logic Gates And Networks
5 Boolean Algebra
6 Synthesis Using And, Or And Not Gates
7 Design Examples
8 Introduction To CAD Tools
9 Introduction To VHDL

3- Implementation Technology

The following topics will be taught

PROGRAMMABLE LOGIC DEVICES (PLDs)

1 Programmable Logic Array (PLA)
2 Programmable Array Logic (PAL)
3 Programming of PLAs and PALs
4 Complex Programmable Logic Devices (CPLDs)
5 Field-Programmable Gate Arrays (FPGA)

4- Optimized Implementation of Logic Functions

The following topics will be taught

Basic Logic Gates
1 Karnaugh Map (K-map)
2 Strategy for Minimization
3 Minimization of Product-of-Sums Forms
4 Incompletely Specified Functions
5 Multiple-Output Circuits
6 NAND and NOR Logic Networks
7 Multi-level Synthesis
8 Analysis of Multi-level Circuits
9 CAD Tools

5- Number Representation and Arithmetic Circuits

The following topics will be taught

1 Positional Number Representation
2 Addition Of Unsigned Numbers
3 Signed Numbers
4 Fast Adders
5 Design Of Arithmetic Circuits Using CAD Tools
6 Multiplication
7 ASCII Character Code

6- Combinational-Circuit Building Blocks or Basic Combinatorial Circuits

The following topics will be taught
1 Multiplexers
2 Decoders
3 Encoders
4 Code Converters
5 Arithmetic Comparison Circuits
6 VHDL For Combinational Circuits

7- Flip-flops, Registers, Counters, and a Simple Processor

The following topics will be taught
1 Basic Latch
2 Gated SR Latch
3 Gated D Latch
4 Master-Slave and Edge-triggered D Flip-flops
5 T Flip-flop
6 JK Flip-flop
7 Summary of Terminology
8 Registers
9 Counters
10 Reset Synchronization
11 Other Types of Counters
12 Using Storage Elements With CAD Tools
13 Using Registers And Counters With CAD Tools
14 Design Examples

8- Synchronous Sequential Circuits

The following topics will be taught

1 BASIC DESIGN STEPS
2 STATE ASSIGNMENT PROBLEM
3 MEALY STATE MODEL
4 DESIGN OF FINITE STATE MACHINES USING                  CAD TOOLS
5 SERIAL ADDER EXAMPLE
6 STATE MINIMIZATION
7 DESIGN OF A COUNTER USING THE                                 SEQUENTIAL CIRCUIT APPROACH
8 FSM AS AN ARBITER CIRCUIT
9 ANALYSIS OF SYNCHRONOUS SEQUENTIAL                  CIRCUITS
10 ALGORITHMIC STATE MACHINE (ASM) CHARTS
11 FORMAL MODEL FOR SEQUENTIAL CIRCUITS

Section 2
Very High Speed Integrated Circuit Hardware Description Language (VHDL)

1 . Introduction
2. VHDL is Like a Programming Language
3. VHDL Describes Structure
4. VHDL Describes Behaviour
5. Model Organisation
6. Advanced VHDL
7. Sample Models